深圳未来时帧半导体有限公司
高级数字集成电路设计工程师
30-60K·13薪
香港
3-5年
本科
全职
职位描述
Our Silicon Engineering team is seeking a Sr Digital Design Engineer. You will help lead the development of next generation BMS ICs. Join the Future Semi team that is enabling the new energy and automotive industry.
Location: Hong Kong (registered address, office address should be located in Hong Kong Science and Technology Park)
工作内容：
● Digital silicon designer on new BMS IC developments
● Develop custom digital libraries for BMS ICs including high voltage operation
● Develop RTL and verification flows, work on synthesis, place and route, and use statistical timing analysis for timing closure BMS IC designs
● Participate in lab silicon validation and characterization
● Work on improving the digital development methodology including choice of tools and processes
岗位要求：
● Have a Hong Kong permanent identity card
●Minimum Bachelor's Degree in electrical or related engineering (MSEE preferred)
5+ years related industry experience in digital design including Verilog frontend design, synthesis, place and route, and timing closure
● A demonstrated work history in digital silicon design from taping out new designs through volume production
● Familiarity with mixed-signal mode verification methodology (SystemVerilog, AMS, Nanotime)
● Track record for developing new processes and procedures in design developments
● Ability to work as part of a strong leadership team to realize ambitious growth objectives
Location: Hong Kong (registered address, office address should be located in Hong Kong Science and Technology Park)
工作内容：
● Digital silicon designer on new BMS IC developments
● Develop custom digital libraries for BMS ICs including high voltage operation
● Develop RTL and verification flows, work on synthesis, place and route, and use statistical timing analysis for timing closure BMS IC designs
● Participate in lab silicon validation and characterization
● Work on improving the digital development methodology including choice of tools and processes
岗位要求：
● Have a Hong Kong permanent identity card
●Minimum Bachelor's Degree in electrical or related engineering (MSEE preferred)
5+ years related industry experience in digital design including Verilog frontend design, synthesis, place and route, and timing closure
● A demonstrated work history in digital silicon design from taping out new designs through volume production
● Familiarity with mixed-signal mode verification methodology (SystemVerilog, AMS, Nanotime)
● Track record for developing new processes and procedures in design developments
● Ability to work as part of a strong leadership team to realize ambitious growth objectives
公司介绍
深圳未来时帧半导体有限公司于2023年3月13日成立，注册资本1138.889万元。主营高性能及特殊工艺电池管理模拟芯片研发和销售，填补国产车规BMS AFE、储能BMS AFE空白。主要产品包括车规BMS AFE、储能BMS AFE、消费BMS AFE 、电池计量芯片。
自成立以来，未来时帧始终坚持以市场需求为导向，紧跟行业发展趋势，积累了丰富的技术经验和行业资源。我们拥有一支专业的研发团队，规模达20余人。专注于BMS电池管理芯片的研发和创新，为新能源汽车、电力储能、工业等领域提供全方位的解决方案。
自成立以来，未来时帧始终坚持以市场需求为导向，紧跟行业发展趋势，积累了丰富的技术经验和行业资源。我们拥有一支专业的研发团队，规模达20余人。专注于BMS电池管理芯片的研发和创新，为新能源汽车、电力储能、工业等领域提供全方位的解决方案。
香港湾仔区依时商业大厦1801室
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